The very large scale integration (VLSI) era and, in particular, the 1990s ultra large scale integration (ULSI) circuit integration era require the integration of a million or more circuit components per device (i.e., die). Realizing the ULSI era has required decreasing critical dimensions (CDs) accordingly, and has presented challenges in manufacturing, yield enhancement, and defect detection process areas. As semiconductor geometries shrink, the need for monitoring of critical dimensions (CDs) to achieve precise control over feature size dimensions has grown. The use of optical techniques for monitoring CDs has become less practical, even in the ultraviolet (UV) range, because of the resolution limits inherent with optical diffraction. To overcome the limitations of optical techniques, scanning electron microscope-based inspection processes are generally used for current era integrated circuit critical dimension metrology and defect inspection in wafer fabrication facilities.
In addition to their conventional use to monitor CDs, scanning electron microscopes (SEMs) and electron beam probers, an adaptation of the SEM for functional probing of structures in IC devices, are utilized to obtain voltage contrast images of devices. In a voltage contrast image, the voltage of a structure undergoing imaging determines the brightness of that structure in the image. This is achieved by selective energy filtering to control the detection of secondary electrons, which enhances the voltage contrast. For semiconductor wafers, the SEM voltage contrast method has been proposed for detection of electrical defects that electrically isolate or ground structures.
Various commercial electron-beam wafer inspection systems such as KLA-Tencor's SEMSpec and Analytical Solutions' ISI WB-6 SEM have also been developed to use voltage contrast methods to find “killer” electrical defects and nuisance defects. Killer electrical defects adversely affect the operation of a completed integrated circuit (IC), while “nuisance” defects may not adversely affect the performance of a completed IC. Because nuisance defects are much more numerous than killer defects, it is especially time-consuming to electrically test all of these defects to determine the final performance impact on the IC. KLA-Tencor, Analytical Solutions, and other similar commercial systems have been used in conjunction with digital image processing computers to automate location of killer and nuisance electrical defects, as well as to conduct failure analysis of integrated circuits due to killer and nuisance electrical defects.
However, none of the commercial systems presently available which use the SEM voltage contrast method are configured to purposely detects voids in films, unless the void is of such large dimension that an obvious open or short electrical defect is manifested. However, many voids can be less than 30 nm in size, and are on the order of film roughness dimensions. Small voids in films may result in marginal resistance or resistance gradients between device structures, and give rise to reduced device performance and reduction in process yields.
Therefore what is needed is a system suitable for inspecting semiconductor wafers in a production environment which provides improved feedback that does not suffer from the known limitations, and which is capable of revealing small hidden voids.